I/Q Balance-Enhanced Wideband Receiver Front-End for 2G/3G/4G/5G NR Cellular Applications

被引:18
作者
Han, Junghwan [1 ]
Kwon, Kuduck [2 ]
机构
[1] Chungnam Natl Univ, Dept Radio & Informat Commun Engn, Daejeon 34134, South Korea
[2] Kangwon Natl Univ, Dept Elect Engn, Chunchon 200701, South Korea
基金
新加坡国家研究基金会;
关键词
Mixers; Receivers; Calibration; Gain; Switches; Wideband; Radio frequency; Cellular; CMOS; error-vector magnitude; I; Q imbalance; Q mismatch; passive mixer; quadrature local oscillator; quadrature mixer; receiver front-end; wideband low-noise transimpedance amplifier; 2G; 3G; 4G; 5G new radio; MISMATCH COMPENSATION; RF TRANSCEIVER; CMOS RECEIVER; GAIN; PHASE; CALIBRATION; IMBALANCE; 5G;
D O I
10.1109/TCSI.2020.2974486
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, an in-phase (I) and quadrature-phase (Q) balance-enhanced wideband receiver RF front-end is proposed using a quadrature sampling passive mixer configuration, which can be applicable to 2G/3G/4G/5G new radio (NR) applications. Compensating mixer switches are additionally utilized in parallel with main mixer switches in a quadrature mixer for quadrature downconversion. As a consequence, gain and phase errors from the mixer can be mutually compensated at the mixer output, and I/Q imbalance characteristics are significantly improved without an extra calibration process. For the verification of I/Q balancing improvement, the receiver front-end is implemented, which consists of a wideband low noise transconductance amplifier, a double-balanced quadrature sampling passive mixer, transimpedance amplifiers, and quadrature local oscillator signal circuitry. The demonstrated design is fabricated in a 65-nm CMOS process and mainly characterized in long-term evolution (LTE) frequency bands. The implemented design achieves an error-vector magnitude of less than 2% with conversion gains and noise figures of more than 41 dB and less than 4.7 dB for all frequency bands, respectively. Moreover, the design attains in-band and out-of-band IIP3s of higher than -12 dBm and -2.7 dBm for LTE frequency division duplexing test conditions, respectively. The active die area of the implemented receiver front-end is 0.72 mm(2). It draws a bias current of 18.2 mA from a nominal supply voltage of 1.2 V.
引用
收藏
页码:1881 / 1891
页数:11
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