Accelerating Chip Design with Machine Learning: From Pre-Silicon to Post-Silicon

At sub-22nm regime, chip designs have to go through hundreds to thousands of steps and tasks before shipment. Many tasks are data and simulation intensive, thereby demanding significant amount of resources and time. Unlike conventional methodologies relying on experiences to manually handle data and extract models, recent advances in machine learning techniques enable the successful applications in various complex tasks to accelerate modern chip designs, ranging from pre-silicon verification to post-silicon validation and tuning. The goals are to reduce the amount of time and efforts to process and understand data through automatic and effective learning and enhancing from examples. In this paper we review and discuss several application cases of machine learning techniques, including pre-silicon hotspot detection through classification, post-silicon variation extraction and bug localization through inference, and post-silicon timing tuning through iterative learning and optimization, so as to leverage the potentials and inspire more future imiovations.