Implementation and Analysis of AES Encryption on GPU

被引:65
作者
Li, Qinjian [1 ]
Zhong, Chengwen [2 ]
Zhao, Kaiyong [3 ]
Mei, Xinxin [3 ]
Chu, Xiaowen [3 ]
机构
[1] Nortwestern Polytech Univ, Ctr High Performance Comp, Xian 710072, Peoples R China
[2] Nortwestern Polytech Univ, Natl Key Lab Sci & Technol, Aerodynam Design & Res, Xian 710072, Peoples R China
[3] Hong Kong Baptist Univ, Dept Comp Sci, Inspur HKBU Joint Lab Heterogeneous Comp, Hong Kong, Peoples R China
来源
2012 IEEE 14TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS & 2012 IEEE 9TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (HPCC-ICESS) | 2012年
关键词
CUDA; GPU; AES; Electronic Codebook; Cipher Feedback; parellel computing;
D O I
10.1109/HPCC.2012.119
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
GPU is continuing its trend of vastly outperforming CPU while becoming more general purpose. In order to improve the efficiency of AES algorithm, this paper proposed a CUDA implementation of Electronic Codebook (ECB) mode encoding process and Cipher Feedback (CBC) mode decoding process on GPU. In our implementation, the frequently accessed T-boxes were allocated on on-chip shared memory and the granularity that one thread handles a 16 Bytes AES block was adopted. Finally, we achieved the highest performance of around 60 Gbps throughput on NVIDIA Tesla C2050 GPU, which runs up to 50 times faster than a sequential implementation based on Intel Core i7-920 2.66GHz CPU. In addition, we discussed the optimization under some practical application scenarios such as overlapping GPU processing and data transfer.
引用
收藏
页码:843 / 848
页数:6
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