FPGA implementation of fractional-order discrete memristor chaotic system and its commensurate and incommensurate synchronisations

被引：33
作者：
Karthikeyan, Anitha [1 ,2 ]
Rajagopal, Karthikeyan [1 ,2 ]
机构：
[1] Univ Technol, Dept Elect & Commun Engn, Lae, Papua N Guinea
[2] Def Univ, Ctr Nonlinear Dynam, Bishoftu, Ethiopia
来源：
PRAMANA-JOURNAL OF PHYSICS | 2018年 / 90卷 / 01期
关键词：
Memristor; discretisation; fractional order; synchronisation; field programmable gate arrays; SLIDING-MODE SYNCHRONIZATION; INDUCTION;
D O I：
10.1007/s12043-017-1507-8
中图分类号：
O4 [物理学];
学科分类号：
0702 ;
摘要：
A new fourth-order memristor chaotic oscillator is taken to investigate its fractional-order discrete synchronisation. The fractional-order differential model memristor system is transformed to its discrete model and the dynamic properties of the fractional-order discrete system are investigated. A new method for synchronising commensurate and incommensurate fractional discrete chaotic maps are proposed and validated. Numerical results are established to support the proposed methodologies. This method of synchronisation can be applied for any fractional discrete maps. Finally the fractional-order memristor system is implemented in FPGA to show that the chaotic system is hardware realisable.
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页数：13
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