Cycle-Accurate Network on Chip Simulation with Noxim

被引:171
作者
Catania, Vincenzo [1 ]
Mineo, Andrea [1 ]
Monteleone, Salvatore [1 ]
Palesi, Maurizio [2 ]
Patti, Davide [1 ]
机构
[1] Univ Catania, Dept Elect Elect & Comp Engn, I-95125 Catania, Italy
[2] Kore Univ Enna, Fac Engn & Architecture, I-94100 Enna, Italy
来源
ACM TRANSACTIONS ON MODELING AND COMPUTER SIMULATION | 2016年 / 27卷 / 01期
关键词
Cycle-accurate simulator; energy and power statistics; networks-on-chip; ARCHITECTURE; DESIGN; NOC; PROTOCOL;
D O I
10.1145/2953878
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
The on-chip communication in current Chip-MultiProcessors (CMP) and MultiProcessor-SoC (MPSoC) is mainly based on the Network-on-Chip (NoC) design paradigm. Unfortunately, it is foreseen that conventional NoC architectures cannot sustain the performance, power, and reliability requirements demanded by the next generation of manycore architectures. Recently, emerging on-chip communication technologies, like wireless Networks-on-Chip (WiNoCs), have been proposed as candidate solutions for addressing the scalability limitations of conventional multi-hop NoC architectures. In a WiNoC, a subset of network nodes are equipped with a wireless interface which allows them long-range communication in a single hop. Assessing the performance and power figures of NoC and WiNoC architectures requires the availability of simulation tools that are often limited on modeling specific network configurations. This article presents Noxim, an open, configurable, extendible, cycle-accurate NoC simulator developed in SystemC, which allows to analyze the performance and power figures of both conventional wired NoC and emerging WiNoC architectures.
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页数:25
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