共 32 条
[1]
A digital architecture for support vector machines: Theory, algorithm, and FPGA implementation
[J].
IEEE TRANSACTIONS ON NEURAL NETWORKS,
2003, 14 (05)
:993-1009
[2]
Mixing floating- and fixed-point formats for neural network learning on neuroprocessors
[J].
MICROPROCESSING AND MICROPROGRAMMING,
1996, 41 (10)
:757-769
[3]
ANGUITA D, 2005, IEEE INT JOINT C NEU
[4]
ANGUITA D, 2007, IEEE INT JOINT C NEU
[5]
ANGUITA D, NEUROCOMPUT IN PRESS
[6]
Feed-forward support vector machine without multipliers
[J].
IEEE TRANSACTIONS ON NEURAL NETWORKS,
2006, 17 (05)
:1328-1331
[7]
[Anonymous], 2002, HDB METAHEURISTICS
[8]
USING SIMULATIONS OF REDUCED PRECISION ARITHMETIC TO DESIGN A NEURO-MICROPROCESSOR
[J].
JOURNAL OF VLSI SIGNAL PROCESSING,
1993, 6 (01)
:33-44
[9]
BEAUCHAMP MJ, 2006, INT C FIELD PROGR LO