Threshold voltage model for MOSFETs with high-K gate dielectrics

被引:21
|
作者
Liu, XY [1 ]
Kang, JF [1 ]
Sun, L [1 ]
Han, RQ [1 ]
Wang, YY [1 ]
机构
[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China
关键词
gate insulator; high-K gate dielectric; MOSFET; threshold voltage; short channel effect;
D O I
10.1109/55.998873
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analytic threshold voltage model, which can account for the short channel effect and the fringing field effect of sub-100 run high-K gate dielectrics MOSFETs, has been developed. The model considers the two-dimensional (2-D) effect both in silicon bulk and in gate dielectric layer. The results of the model are consistent with 2-D numerical simulation results.
引用
收藏
页码:270 / 272
页数:3
相关论文
共 50 条
  • [1] A new analytical threshold voltage model for symmetrical double-gate MOSFETs with high-k gate dielectrics
    Chiang, T. K.
    Chen, M. L.
    SOLID-STATE ELECTRONICS, 2007, 51 (03) : 387 - 393
  • [2] Vertical Power SiC MOSFETs with High-k Gate Dielectrics and Superior Threshold Voltage Stability
    Wirths, Stephan
    Arango, Yulieth
    Mihaila, Andrei
    Bellini, Marco
    Romano, Gianpaolo
    Alfieri, Giovanni
    Belanche, Manuel
    Knoll, Lars
    Bianda, Enea
    Mengotti, Elena
    PROCEEDINGS OF THE 2020 32ND INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD 2020), 2020, : 226 - 229
  • [3] A Compact Threshold-Voltage Model of MOSFETs with Stack High-k Gate Dielectric
    Ji, F.
    Xu, J. P.
    Chen, J. J.
    Xu, H. X.
    Li, C. X.
    Lai, P. T.
    2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009), 2009, : 236 - +
  • [4] Noise in Si and SiGe MOSFETs with high-k gate dielectrics
    von Haartman, M
    Malm, BG
    Hellström, PE
    Östling, M
    NOISE AND FLUCTUATIONS, 2005, 780 : 225 - 230
  • [5] Analysis of ultra short MOSFETs with high-k gate dielectrics
    Dragosits, K
    Ponomarev, Y
    Dachs, C
    Selberherr, S
    SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2001, 2001, : 412 - 415
  • [6] 2D threshold-voltage model for high-k gate-dielectric MOSFETs
    Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
    不详
    Pan Tao Ti Hsueh Pao, 2006, 10 (1725-1731):
  • [7] A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stacks
    何进
    马晨月
    张立宁
    张健
    张兴
    半导体学报, 2009, 30 (08) : 63 - 66
  • [8] A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stacks
    He Jin
    Ma Chenyue
    Zhang Lining
    Zhang Jian
    Zhang Xing
    JOURNAL OF SEMICONDUCTORS, 2009, 30 (08)
  • [9] A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics
    Vimala, P.
    Balamurugan, N. B.
    JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, 2014, 9 (02) : 649 - 654
  • [10] A simulation study of FIBL in Ge MOSFETs with high-k gate dielectrics
    Tan, Yoke Ping
    James, Mang-Kin Lau
    Zhang, Qingchun
    Wu, Nan
    Zhu, Chunxiang
    2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS, 2005, : 111 - 113