Threshold voltage model for MOSFETs with high-K gate dielectrics

被引：21

作者：

Liu, XY ^{[1
]}

Kang, JF ^{[1
]}

Sun, L ^{[1
]}

Han, RQ ^{[1
]}

Wang, YY ^{[1
]}

机构：

[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China

来源：

IEEE ELECTRON DEVICE LETTERS | 2002年 / 23卷 / 05期

关键词：

gate insulator; high-K gate dielectric; MOSFET; threshold voltage; short channel effect;

D O I：

10.1109/55.998873

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analytic threshold voltage model, which can account for the short channel effect and the fringing field effect of sub-100 run high-K gate dielectrics MOSFETs, has been developed. The model considers the two-dimensional (2-D) effect both in silicon bulk and in gate dielectric layer. The results of the model are consistent with 2-D numerical simulation results.

引用

页码：270 / 272

页数：3

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