Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA

被引：10
|
作者：
Sen, Bibhash [1 ]
Dutta, Manojit [1 ]
Banik, Debajyoty [1 ]
Singh, Dipak K. [1 ]
Sikdar, Biplab K. [2 ]
机构：
[1] Natl Inst Technol, Dept Comp Sci & Engn, Durgapur 713209, W Bengal, India
[2] Bengal Engn & Sci Univ, Dept Comp Sci & Technol, Sibpur 711103, W Bengal, India
来源：
2012 INTERNATIONAL SYMPOSIUM ON ELECTRONIC SYSTEM DESIGN (ISED 2012) | 2012年
关键词：
Quantum-dot Cellular Automata (QCA); Reversible Arithmetic Logic Unit; Fault tolerant ALU;
D O I：
10.1109/ISED.2012.50
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This work targets design of reversible ALU (arithmetic logic unit) in QCA (Quantum-dot Cellular Automata) framework. The design is based on the reversible QCA structure (RQCA) introduced in this paper. A fault tolerant architecture of reversible ALU is also synthesized. The proposed designs are verified and evaluated over the existing ALU designs and found to be more efficient in terms of design complexity and quantum cost.
引用
收藏
页码：241 / 245
页数：5
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