Nanometer scale p-type Schottky barrier metal-oxide-semiconductor field-effect transistor using platinum silicidation through oxide technique combined with two-step annealing process

被引：0

作者：

Yun, Hyung-Joong ^{[1
,2
]}

Jang, Moongyu ^{[3
]}

Choi, Sung-Jin ^{[4
]}

Lee, Young-Boo ^{[5
]}

Ahn, Kwang-Soon ^{[6
]}

Choi, Chel-Jong ^{[1
,7
]}

机构：

[1] Chonbuk Natl Univ, SPRC, Sch Semicond & Chem Engn, Jeonju 561756, South Korea

[2] Korea Basic Sci Inst, Div Mat Sci, Taejon 305333, South Korea

[3] ETRI, Taejon 305700, South Korea

[4] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA

[5] Korea Basic Sci Inst, Jeonju Ctr, Jeonju 561756, South Korea

[6] Yeungnam Univ, Sch Chem Engn, Kyongsan 712749, South Korea

[7] Chonbuk Natl Univ, Dept BIN Fus Technol, Jeonju 561756, South Korea

来源：

JOURNAL OF ALLOYS AND COMPOUNDS | 2013年 / 563卷

基金：

新加坡国家研究基金会;

关键词：

SB-MOSFET; PtSi; Silicidation through oxide; Two-step annealing; PTSI CONTACT METALLURGY; SOURCE/DRAIN; SILICON; MOSFETS; STABILITY; SEQUENCES; BODY; UTB;

D O I：

10.1016/j.jallcom.2013.02.099

中图分类号：

O64 [物理化学（理论化学）、化学物理学];

学科分类号：

070304 ; 081704 ;

摘要：

25-nm-gate-length Schottky barrier metal-oxide-semiconductor field-effect transistors (SB-MOSFETs) with platinum silicide (PtSi) was fabricated using silicidation through oxide technique coupled with two-step annealing process. The manufactured SB-MOSFET showed a large on/off current ratio (>10(7)) with excellent short-channel characteristics such as low values of subthreshold swing (83 mV/dec.) and drain induced barrier lowering (23 mV). A controlled Pt flux caused by the densification of SiOx during low temperature 1st step annealing leads to the homogeneous growth of PtSi films at high temperature 2nd step annealing, which was responsible for the superior device performance of nanometer scale SB-MOSFET. (C) 2013 Elsevier B.V. All rights reserved.

引用

页码：108 / 112

页数：5

共 32 条

[1] Suppression of leakage current in Schottky barrier metal-oxide-semiconductor field-effect transistors
Calvet, LE
Luebben, H
Reed, MA
Wang, C
Snyder, JP
Tucker, JR
[J]. JOURNAL OF APPLIED PHYSICS, 2002, 91 (02) : 757 - 759
[2] Electron transport measurements of Schottky barrier inhomogeneities
Calvet, LE
Wheeler, RG
Reed, MA
[J]. APPLIED PHYSICS LETTERS, 2002, 80 (10) : 1761 - 1763
[3] PTSI CONTACT METALLURGY - COMPARISON OF DIFFERENT ANNEALING SEQUENCES, ANNEALING TIME AND AMBIENTS, AND DEPOSITION TECHNIQUES OF PT
CHANG, CA
[J]. JOURNAL OF APPLIED PHYSICS, 1986, 59 (09) : 3116 - 3121
[4] PTSI CONTACT METALLURGY FORMED BY 3-TEMPERATURE ANNEALING SEQUENCES AND SHORT ANNEALING TIME
CHANG, CA
SEGMULLER, A
[J]. JOURNAL OF APPLIED PHYSICS, 1987, 61 (01) : 201 - 205
[5] Platinum silicided p-type Schottky barrier metal-oxide-semiconductor field-effect transistors scaled down to 20 nm
Choi, C. -J.
Jang, M. -G.
Kim, Y. -Y.
Jun, M. -S.
Kim, T. -Y.
Lee, S. -J.
[J]. ELECTRONICS LETTERS, 2008, 44 (02) : 159 - 160
[6] Electrical and structural properties of high-k Er-silicate gate dielectric formed by interfacial reaction between Er and SiO2 films
Choi, Chel-Jong
Jang, Moon-Gyu
Kim, Yark-Yeon
Jun, Myung-Sim
Kim, Tae-Youb
Song, Myeong-Ho
[J]. APPLIED PHYSICS LETTERS, 2007, 91 (01)
[7] Formation and stability of silicides on polycrystalline silicon
Colgan, EG
Gambino, JP
Hong, QZ
[J]. MATERIALS SCIENCE & ENGINEERING R-REPORTS, 1996, 16 (02) : 43 - 96
[8] Performance advantage of Schottky source/drain in ultrathin-body silicon-on-insulator and dual-gate CMOS
Connelly, D
Faulkner, C
Grupp, DE
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (05) : 1340 - 1345
[9] GROWTH-RATES FOR PT2SI AND PTSI FORMATION UNDER UHV AND CONTROLLED IMPURITY ATMOSPHERES
CRIDER, CA
POATE, JM
[J]. APPLIED PHYSICS LETTERS, 1980, 36 (06) : 417 - 419
[10] SILICON DIOXIDE DEFECTS INDUCED BY METAL IMPURITIES
DALLAPORTA, H
LIEHR, M
LEWIS, JE
[J]. PHYSICAL REVIEW B, 1990, 41 (08): : 5075 - 5083

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