A 120-mm(2) 64-Mb NAND Flash memory achieving 180 ns/Byte effective program speed

被引:15
作者
Kim, JK
Sakui, K
Lee, SS
Itoh, Y
Kwon, SC
Kanazawa, K
Lee, KJ
Nakamura, H
Kim, KY
Himeno, T
Kim, JR
Kanda, K
Jung, TS
Oshima, Y
Suh, KD
Hashimoto, K
Ahn, ST
Miyamoto, J
机构
[1] TOSHIBA CO LTD,SEMICOND DEVICE ENGN LAB,KAWASAKI,KANAGAWA 210,JAPAN
[2] TOSHIBA CO LTD,MEMORY DIV,KAWASAKI,KANAGAWA 210,JAPAN
[3] TOSHIBA CO LTD,ULSI LABS,KAWASAKI,KANAGAWA 210,JAPAN
关键词
D O I
10.1109/4.568831
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Emerging application areas of mass storage Flash memories require low cost, high density Flash memories with enhanced device performance, This paper- describes a 64 Mb NAND Flash memory having improved read and program performances, A 40 MB/s read throughput is achieved by improving the page sensing time and employing the full-chip burst read capability, A 2-mu s random access time is obtained by using a precharged capacitive decoupling sensing scheme with a staggered row decoder scheme, The full-chip burst read capability is realized by introducing a new array architecture. A narrow incremental step pulse programming scheme achieves a 5 MB/s program throughput corresponding to 180 ns/Byte effective program speed, The chip has been fabricated using a 0.4-mu m single-metal CMOS process resulting in a die size of 120 mm(2) and an effective cell size of 1.1 mu m(2).
引用
收藏
页码:670 / 680
页数:11
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