Emerging application areas of mass storage Flash memories require low cost, high density Flash memories with enhanced device performance, This paper- describes a 64 Mb NAND Flash memory having improved read and program performances, A 40 MB/s read throughput is achieved by improving the page sensing time and employing the full-chip burst read capability, A 2-mu s random access time is obtained by using a precharged capacitive decoupling sensing scheme with a staggered row decoder scheme, The full-chip burst read capability is realized by introducing a new array architecture. A narrow incremental step pulse programming scheme achieves a 5 MB/s program throughput corresponding to 180 ns/Byte effective program speed, The chip has been fabricated using a 0.4-mu m single-metal CMOS process resulting in a die size of 120 mm(2) and an effective cell size of 1.1 mu m(2).