FPGA Implementation of a Real-Time Super-Resolution System with a CNN Based on a Residue Number System

A super-resolution technology is used for filling the gap between high-resolution displays and lower-resolution images. One of various algorithms to interpolate the lost information is to use a convolutional neural network (CNN). This paper shows an FPGA implementation and a performance evaluation of our CNN-based super-resolution system, which can process moving images in real time. We apply horizontal and/or vertical flips to input images instead of pre-enlargement. This method prevents information loss and enables the network to make the best use of its input size. In addition, we adopted the residue number system (RNS) to reduce resource utilization. The proposed system can perform super-resolution from 960x540 to 1920x1080 at 60fps with a latency of less than 1ms. In spite of resource restriction of the FPGA, the system generates clear super-resolution images with smooth edges. The evaluation results also revealed the superior quality in terms of the peak signal-to-noise ratio (PSNR), compared to other systems using pre-enlargement.