ASIC Validation Architectures Hardware versus Simulation

被引：0
作者：
Molnar, Laszlo [1 ,2 ]
Gontean, Laurel [1 ]
机构：
[1] Politehn Univ Timisoara, Dept Appl Elect, Timisoara, Romania
[2] Continental Automot Timisoara, Timisoara, Romania
来源：
2017 21ST INTERNATIONAL CONFERENCE ON SYSTEM THEORY, CONTROL AND COMPUTING (ICSTCC) | 2017年
关键词：
validation; simulation; virtual platform; analog; digital; mixed-signal; ASIC; ECU; HPFP; VHDL;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
The currently used hardware validation architectures for Application Specific Integrated Circuits intended for automotive Engine Control Unit development are reviewed and a new architecture is proposed. An alternative to hardware validation by different simulation architectures is proposed and analyzed.
引用
收藏
页码：671 / 676
页数：6
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