ASIC Validation Architectures Hardware versus Simulation

被引：0
作者：
Molnar, Laszlo [1 ,2 ]
Gontean, Laurel [1 ]
机构：
[1] Politehn Univ Timisoara, Dept Appl Elect, Timisoara, Romania
[2] Continental Automot Timisoara, Timisoara, Romania
来源：
2017 21ST INTERNATIONAL CONFERENCE ON SYSTEM THEORY, CONTROL AND COMPUTING (ICSTCC) | 2017年
关键词：
validation; simulation; virtual platform; analog; digital; mixed-signal; ASIC; ECU; HPFP; VHDL;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
The currently used hardware validation architectures for Application Specific Integrated Circuits intended for automotive Engine Control Unit development are reviewed and a new architecture is proposed. An alternative to hardware validation by different simulation architectures is proposed and analyzed.
引用
收藏
页码：671 / 676
页数：6
相关论文
共 50 条
  • [21] Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems
    Sood, Surinder
    Malik, Avinash
    Roop, Partha
    2022 20TH ACM-IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR SYSTEM DESIGN (MEMOCODE), 2022,
  • [22] VERIFICATION AND VALIDATION OF HARDWARE DESIGNS VIA HARDWARE PETRI NETS
    HO, C
    FORWARD, KE
    COMPUTER SYSTEMS SCIENCE AND ENGINEERING, 1994, 9 (01): : 65 - 72
  • [23] Validation of management simulation model
    Resinovi, G
    Gradisar, M
    Turk, T
    ASSOCIATION FOR INFORMATION SYSTEMS PROCEEDING OF THE AMERICAS CONFERENCE ON INFORMATION SYSTEMS, 1997, : 625 - 627
  • [24] VALIDATION OF SHIPHANDLING SIMULATION MODELS
    Berg, Tor E.
    Ringen, Edvard
    OMAE2011: PROCEEDINGS OF THE ASME 30TH INTERNATIONAL CONFERENCE ON OCEAN, OFFSHORE AND ARCTIC ENGINEERING, VOL 1: OFFSHORE TECHNOLOGY: POLAR AND ARCTIC SCIENCES AND TECHNOLOGY, 2011, : 705 - 712
  • [25] Verification and validation of simulation models
    Sargent, R. G.
    JOURNAL OF SIMULATION, 2013, 7 (01) : 12 - 24
  • [26] Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning
    Ranjan, Rajeev
    Hansen, Mirko
    Ponce, Pablo Mendoza
    Abu Saleh, Lait
    Schroeder, Dietmar
    Ziegler, Martin
    Kohlstedt, Hermann
    Krautschneider, Wolfgang H.
    2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
  • [27] Simulation architectures for information operations
    Allwright, A
    Gaertner, P
    BATTLESPACE DIGITIZATION AND NETWORK-CENTRIC SYSTEMS III, 2003, 5101 : 180 - 191
  • [28] High-Performance Hardware Architectures for Galois Counter Mode
    Satoh, Akashi
    Sugawara, Takeshi
    Aoki, Takafumi
    IEEE TRANSACTIONS ON COMPUTERS, 2009, 58 (07) : 917 - 930
  • [29] Cloud Server Benchmark Suite for Evaluating New Hardware Architectures
    Wu, Hao
    Liu, Fangfei
    Lee, Ruby B.
    IEEE COMPUTER ARCHITECTURE LETTERS, 2017, 16 (01) : 14 - 17
  • [30] Benefits of hardware accelerated simulation
    Wisniewski, R
    Bukowiec, A
    Wegrzyn, M
    DESDES '1: PROCEEDINGS OF THE INTERNATIONAL WORKSHOP ON DISCRETE-EVENT SYSTEM DESIGN, 2001, : 229 - 234
12345