Simulation-based Analysis of FF Behavior in Presence of Power Supply Noise

被引：0

作者：

Miura, Yukiya ^{[1
]}

Yamamoto, Takuya ^{[2
]}

机构：

[1] Tokyo Metropolitan Univ, Fac Syst Design, Tokyo, Japan

[2] Tokyo Metropolitan Univ, Grad Sch Syst Design, Tokyo, Japan

来源：

2017 IEEE 23RD INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS) | 2017年

基金：

日本学术振兴会;

关键词：

bit-flip; flip-flops; latches: malfunction; power supply noise; IR-DROP;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In accordance with shrinking of device sizes and the low-power design of VLSI circuits, power supply noises such as IR-drop affects the operation of SRAM memory cells. Error occurrences in SRAM have already been reported, and several countermeasures have been proposed. It is likely that further device shrinking and lower-power design will cause errors similar to those in SRAM for FF circuits, and countermeasures will be needed. In this paper, we analyze the effect of power supply noises on FF circuits and investigate the cause of error occurrences. On the basis of the analysis results, we propose countermeasures for FF malfunctions caused by power supply noise.

引用

页码：151 / 156

页数：6

共 29 条

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