Implementation of a High-Speed Discrete-Time Analog Emulator for Real-Time Fault Location in Electrical Power Networks

This research presents a discrete-time transmission line model based on the propagation of travelling waves. In this approach, the transmission line is emulated by means of many interconnected elementary delay cells implemented with switched-capacitor (SC) circuits. The accuracy and limitations of this method is compared to existing transconductance-capacitor (gm-C) solutions and is evaluated in the frame of a novel power network fault location method based on the Electromagnetic Time-Reversal (EMTR) principle. The impact of the non-ideal effects associated to analog CMOS SC circuits, such as amplifier finite gain, offset and switch charge injection is evaluated in the same context. After an AMS 0.35 mu m process implementation, it is shown that the present method allows a fault location within 1% resolution and is a hundred times faster than actual digital solutions. This speed improvement allows a fault location within 160ms, making thus real-time applications realistic.