共 50 条
- [2] Self-test methodology for at-speed test of crosstalk in chip interconnects 37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000, 2000, : 619 - 624
- [3] Analysis of crosstalk and process variations effects on on-chip interconnects 2006 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP PROCEEDINGS, 2006, : 163 - +
- [4] Skin effects in system on a chip interconnects SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, 2003, : 392 - 402
- [5] Temperature Dependent Test Scheduling for Multi-core System-on-Chip 2011 20TH ASIAN TEST SYMPOSIUM (ATS), 2011, : 27 - 32
- [6] High-level crosstalk defect simulation for system-on-chip interconnects 19TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2001, : 169 - 175
- [7] Analyzing Crosstalk-Induced Effects in Rough On-Chip Copper Interconnects IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2019, 9 (10): : 1984 - 1992
- [8] System Level Power Estimation of System-on-Chip Interconnects in Consideration of Transition Activity and Crosstalk INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2011, 6448 : 21 - 30
- [9] Preemptive system-on-chip test scheduling IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2004, E87D (03): : 620 - 629
- [10] Optimal system-on-chip test scheduling ATS 2003: 12TH ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2003, : 306 - 311