High Voltage SiC Vertical JFET for High Power RF Applications

We present the optimization of a standard lateral channel vertical JFET for high-frequency high-power applications. It will be shown that SiC JFETs are well suited to fulfill the requirements of certain RF applications when compared to silicon devices. Simulations covering the electrical characteristics will be given together with calculations considering the self-heating of the chip in pulsed-power applications and the corresponding decrease in saturation current. The gate-signal propagation will be analyzed for different chip layouts and the effect on switching speed will be described. Electrical results will demonstrate that the optimized JFET is suitable for RF-transmitter applications, like e.g. solid state RF modules as Klystron replacements in linear accelerators.