Performance Comparison Between Bulk and SOI Junctionless Transistors

被引：66

作者：

Han, Ming-Hung ^{[1
,2
]}

Chang, Chun-Yen ^{[1
,2
]}

Chen, Hung-Bin ^{[1
,2
]}

Wu, Jia-Jiun ^{[1
,2
]}

Cheng, Ya-Chi ^{[3
]}

Wu, Yung-Chun ^{[3
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan

[3] Natl Tsing Hua Univ, Dept Engn & Syst Sci, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2013年 / 34卷 / 02期

关键词：

Fin-shaped field-effect transistor (FinFET); junctionless (JL); 3-D simulation;

D O I：

10.1109/LED.2012.2231395

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The design and characteristics of a junctionless (JL) bulk FinFET were compared with the silicon-on-insulator (SOI) JL nanowire transistor (JNT) using 3-D quantum transport device simulation. The JL bulk FinFET exhibits a favorable ON/OFF current ratio and short-channel characteristics by reducing the effective channel thickness that is caused by the channel/substrate junction. The drain-induced barrier lowering and the subthreshold slope are about 40 mV and 73 mV/dec, respectively, with an ON/OFF current ratio of 10(5) at W = 10 nm. The JL bulk FinFET is less sensitive to the channel thickness than the SOI JNT. Furthermore, the threshold voltage V-th of the JL bulk FinFET can be easily tuned by varying substrate doping concentration N-sub. The modulation range of V-th as N-sub changes from 10(18) to 10(19) cm(-3), which is around 30%.

引用

页码：169 / 171

页数：3

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