Metaheuristics Based CMOS Two-Stage Comparator Optimization

被引：0

作者：

Vural, Reyna Acar ^{[1
]}

Bozkurt, Ufuk ^{[1
]}

Yildirim, Tulay ^{[1
]}

机构：

[1] Yildiz Tech Univ, Dept Elect & Commun Engn, TR-34220 Istanbul, Turkey

来源：

WORLD CONGRESS ON ENGINEERING AND COMPUTER SCIENCE, WCECS 2013, VOL II | 2013年 / Ao,卷

关键词：

constrained optimization; analog integrated circuits; automated design; transistor sizing; metaheuristics; ANALOG; DESIGN;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

This paper investigates nature-inspired metaheuristics for optimized sizing of a CMOS comparator with PMOS input driver. The aim is to minimize MOS transistor area using two nature-inspired metaheuristics, differential evolution and harmony search. Simulation results demonstrate that design specifications are closely met and required functionalities are accommodated in short computational time while area optimization criterion is satisfied.

引用

页码：645 / 650

页数：6

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