A Novel Three-Phase Five-Level Inverter

被引：0

作者：

Chen, J. F. ^{[1
]}

Hsu, W. C. ^{[1
]}

Wu, Y. M. ^{[1
]}

Hsieh, Y. P. ^{[1
]}

Huang, H. Y. ^{[1
]}

Li, J. S. ^{[1
]}

Chen, Y. L. ^{[1
]}

机构：

[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan, Taiwan

来源：

2016 IEEE 8TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (IPEMC-ECCE ASIA) | 2016年

关键词：

Multi-level; Inverter; Three-phase; CASCADE MULTILEVEL INVERTERS; VOLTAGE; CONVERTERS; TOPOLOGIES; DESIGN;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a novel three-phase five-level inverter is proposed. The proposed topology constructed of 12 power switches and 12 diodes to achieve a three-phase five-level AC Y-connected output. The output line-to-line voltage is five levels and total harmonic distortion is lower. Compared to the traditional three-phase inverters, the proposed three-phase five-level inverter can achieve the five output voltage levels with fewer components. In this paper, the details of the mode analyses and control schemes are discussed. An experimental prototype with input voltage 500 V, output power 6 kW, THD 3.62%, and efficiency 98.40% is implemented to verify the theory and feasibility of the proposed topology.

引用

页码：485 / 491

页数：7

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