System-on-a-chip (SoC)-based Hardware Acceleration for Extreme Learning Machine

被引：0

作者：

Safaei, Amin ^{[1
]}

Wu, Q. M. Jonathan ^{[1
]}

Yang, Yimin ^{[1
]}

Akilan, Thangarajah ^{[1
]}

机构：

[1] Univ Windsor, Dept Elect & Comp Engn, Windsor, ON, Canada

来源：

2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS) | 2017年

基金：

加拿大自然科学与工程研究理事会;

关键词：

Extreme learning machine; system on chip field-programmable gate array (SoC FPGA); hardware (HW) neural networks (NNs);

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Extreme learning machine (ELM) is a popular class of supervised models in machine learning that is used in a wide range of applications, such as image object classification, video content analysis (VCA) and human action recognition. However, ELM classification is a computationally demanding task, and the existing hardware implementations are not efficient for embedded systems. This work addresses the implementation of extreme learning machine (ELM) in a system on a chip field-programmable gate-array (SoC FPGA)-based customized architecture to efficiently utilize hardware accelerator. The optimization process consists of parallelism extraction, algorithm tuning and deep pipelining.

引用

页码：470 / 473

页数：4

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