A Novel High-voltage LDMOS with Folded Drift Region

被引：0
|
作者：
Du, Ling [1 ,2 ]
Guo, Yufeng [1 ,2 ]
Yao, Jiafei [1 ,2 ]
Zhang, Jun [1 ,2 ]
Yang, Kemeng [1 ,2 ]
Li, Man [1 ,2 ]
机构：
[1] Nanjing Univ Posts & Telecommun, Coll Elect Sci & Engn, Nanjing 210023, Jiangsu, Peoples R China
[2] Jiangsu Prov Engn Lab RF integrat & Micropackage, Nanjing 210023, Jiangsu, Peoples R China
来源：
2016 16th International Workshop on Junction Technology (IWJT) | 2016年
关键词：
SOI LDMOS;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper proposes a novel high-voltage LDMOS with Folded Drift Region (FDR) structure. The structure extends the effective length of the current path in the limited drift region length, and uniformthe electric field profile in order to have a high breakdown voltage. The structure parameters are optimized and the characteristics are investigated by a 2D device simulator MEDICI. The simulation results show that the electric field, breakdown voltage, and specific on-resistance are effectively improvedwhen compared with those of the conventional device. A breakdown voltage over 600V is obtained on the proposed LDMOS with 10 mu m thick silicon layer, 3 mu m buried oxide and 28 mu m drift region length.
引用
收藏
页码：31 / 34
页数：4
相关论文
共 19 条
  • [1] A Novel RF SOI LDMOS with a Raised Drift Region
    Xu, Qin
    Guo, Yufeng
    Zhang, Ying
    Liu, Leilei
    Yao, Jiafei
    Sheu, Gene
    2012 INTERNATIONAL WORKSHOP ON INFORMATION AND ELECTRONICS ENGINEERING, 2012, 29 : 668 - 672
  • [2] A novel substrate Voltage-assisted RESURF technique in SOI LDMOS with a heavily doped drift region
    Li, Man
    Wang, Ze
    Wang, Zixuan
    Guo, Yufeng
    Zhang, Jun
    Yao, Jiafei
    Zhang, Maolin
    Tang, Weihua
    SOLID-STATE ELECTRONICS, 2023, 207
  • [3] Investigation of a novel SOI LDMOS using p plus buried islands in the drift region by numerical simulations
    Lei, Jianmei
    Hu, Shengdong
    Yang, Dong
    Huang, Ye
    Yuan, Qi
    Guo, Jingwei
    Zeng, Linghui
    Wang, Siqi
    Yang, Xuan
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2018, 17 (02) : 646 - 652
  • [4] Investigation of a novel SOI LDMOS using p+ buried islands in the drift region by numerical simulations
    Jianmei Lei
    Shengdong Hu
    Dong Yang
    Ye Huang
    Qi Yuan
    Jingwei Guo
    Linghui Zeng
    Siqi Wang
    Xuan Yang
    Journal of Computational Electronics, 2018, 17 : 646 - 652
  • [5] Total-Ionizing-Dose Irradiation-Induced Dielectric Field Enhancement for High-Voltage SOI LDMOS
    Zhou, Xin
    Yuan, Zhangyi'an
    Shu, Lei
    Qiao, Ming
    Lu, Zhenlin
    Zhao, Yuanfu
    Li, Zhaoji
    Zhang, Bo
    IEEE ELECTRON DEVICE LETTERS, 2019, 40 (04) : 593 - 596
  • [6] A new high voltage SOI LDMOS with triple RESURF structure
    胡夏融
    张波
    罗小蓉
    姚国亮
    陈曦
    李肇基
    半导体学报, 2011, (07) : 42 - 45
  • [7] A new high voltage SOI LDMOS with triple RESURF structure
    Hu Xiarong
    Zhang Bo
    Luo Xiaorong
    Yao Guoliang
    Chen Xi
    Li Zhaoji
    JOURNAL OF SEMICONDUCTORS, 2011, 32 (07)
  • [8] An analytical model for the vertical electric field distribution and optimization of high voltage REBULF LDMOS
    Hu Xia-Rong
    Lu Rui
    CHINESE PHYSICS B, 2014, 23 (12)
  • [9] Co-Optimization Between Static and Switching Characteristics of LDMOS With p-Type Trapezoidal Gate Embedded in Drift Region
    Shi, Zhangjun
    Li, Xiaojin
    Sun, Yabin
    Zhang, Bo
    Shi, Yanling
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (08) : 4102 - 4108
  • [10] Novel High-K SOI LDMOS with N+Buried Layer
    Wu, Lijuan
    Huang, Ye
    Song, Yue
    Zhu, Lin
    Wu, Yiqing
    IETE TECHNICAL REVIEW, 2022, 39 (02) : 310 - 315
12