Robustness Aspects of 600V GaN-on-Si Based Power Cascoded HFET

被引:0
|
作者
Veereddya, Deepak [1 ]
McDonald, Tim [2 ]
Ambrush, John [2 ]
Diyh, Alfonso [2 ]
Cardwell, Stuart [3 ]
Pandyaa, Bhargav [1 ]
Gargb, Reenu [2 ]
Imam, Mohamed [1 ]
机构
[1] Infineon Technol, PMM Div, Chandler, AZ USA
[2] Infineon Technol, PMM Div, El Segundo, CA USA
[3] Infineon Technol, Reigate, England
来源
2016 IEEE 4TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA) | 2016年
关键词
Gallium Nitride (GaN); Silicon (Si); Hetero-structure Field Effect Transistor (HFET); saturation region; cascode; Forward Biased Safe Operating Area (FBSOA); thermal impedance; short circuit;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power devices in the Forward Bias (FB) and Short Circuit (SC) test conditions were evaluated in this study. The results from FBSOA tests at <= 150 degrees C device channel temperatures in the linear mode operation demonstrated reliable device operation with negligible parametric drifts. However, the test to destruction FBSOA measurements performed at elevated channel temperatures revealed that the GaN MIS HFET's gate dielectric degradation in the cascode structure is the failure root cause and a theory is presumed to explain the pertinent failure mechanism. Similarly, the destructive SC tests on the cascode GaN devices were conducted that displayed very short withstand times. Through this work, we show that the SC withstand times of GaN devices can be improved by design modifications which come with a Figure of Merit compromise.
引用
收藏
页码:162 / 167
页数:6
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