Demonstration of Spike Timing Dependent Plasticity in CBRAM Devices with Silicon Neurons

被引：0

作者：

Mahalanabis, D. ^{[1
]}

Sivaraj, M. ^{[1
]}

Chen, W. ^{[1
]}

Shah, S. ^{[1
]}

Barnaby, H. J. ^{[1
]}

Kozicki, M. N. ^{[1
]}

Christen, J. Blain ^{[1
]}

Vrudhula, S. ^{[1
]}

机构：

[1] Arizona State Univ, Sch Elect Comp & Energy Engn, Tempe, AZ 85281 USA

来源：

2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2016年

关键词：

CBRAM; neuromorphic; resistive memory; STDP; PROGRAMMABLE METALLIZATION CELLS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Spike timing dependent plasticity (STDP) is an important neural process that enables biological neural networks to learn by strengthening or weakening synaptic connections between neurons. This work presents simulation results and post-silicon experimental data that demonstrate for the first time the possibility of tuning the on state resistance of a type of emerging resistive memory device known as conductive bridge random access memory (CBRAM) in accordance with the biological STDP rule for neuromorphic applications. STDP behavior is demonstrated for CBRAM devices integrated with CMOS spiking neuron circuitry through back end of line post-processing for different initial resistance values and spike durations.

引用

页码：2314 / 2317

页数：4

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