共 18 条
- [2] [Anonymous], 2018, Computer Arithmetic Algorithms
- [4] High-speed parallel-prefix VLSI ling adders [J]. IEEE TRANSACTIONS ON COMPUTERS, 2005, 54 (02) : 225 - 231
- [5] Efstathiou C, 2002, ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS, P485, DOI 10.1109/ICECS.2002.1046203
- [6] Ercegovac M., 2004, Digital Arithmetic
- [7] Hwang K., 1979, COMPUTER ARITHMETIC
- [8] HIGH-SPEED BINARY ADDER [J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1981, 25 (2-3) : 156 - 166
- [9] Enhanced 32-bit carry lookahead adder using multiple output enable-disable CMOS differential logic [J]. SBCCI2004:17TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2004, : 181 - 185
- [10] Parhami Behrooz, 2010, Computer Arithmetic Algorithms and Hardware Designs