Preprocessing scheme of intelligent assembly for a high performance VLIW DSP

被引:1
作者
Hu, Yonghua [1 ]
Chen, Shuming [1 ]
Huang, Jie [2 ]
机构
[1] Natl Univ Def Technol, Sch Comp Sci, Changsha 410073, Hunan, Peoples R China
[2] Hunan Univ Sci & Technol, Sch Comp Sci & Engn, Xiangtan, Peoples R China
来源
SECOND INTERNATIONAL CONFERENCE ON CLOUD AND GREEN COMPUTING / SECOND INTERNATIONAL CONFERENCE ON SOCIAL COMPUTING AND ITS APPLICATIONS (CGC/SCA 2012) | 2012年
关键词
preprocessing; VLIW DSP; intelligent Assembly; compiling;
D O I
10.1109/CGC.2012.114
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The time and energy needed for high-performance VLIW digital signal processors (DSPs) is dependent on the execution efficiency of the codes running on them. YHFT-Matrix DSP is a kind of high performance floating-point DSP for wireless communication and video image processing. It has strong ability to handle vector data and has abundant instruction set. To provide efficient codes for it, and meanwhile to ease the workload for programmers and to reduce programming difficulty, we use the intelligent assembly scheme, which combines the advantages of high-level language and assembly language. In this paper, the preprocessing for intelligent assembly is presented and the algorithm for lexical analysis and that for macro processing are investigated. For the former, a one time scan and step-by-step processing method is used to recognize kinds of lexical elements; for the latter, an algorithm based on a file relation graph is developed to settle macrosubstitution. The preprocessing results based on these algorithms can provide global information and information needed for subsequent process.
引用
收藏
页码:187 / 190
页数:4
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