A new PWM method to reduce beat phenomenon in large-capacity inverters with low switching frequency

被引：38

作者：

Iwaji, Y ^{[1
]}

Sukegawa, T

Okuyama, T

Ikimi, T

Shigyo, M

Tobise, M

机构：

[1] Hitachi Ltd, Hitachi Res Lab, Hitachi, Ibaraki 3191292, Japan

[2] Hitachi Ltd, Omika Works, Hitachi, Ibaraki 3191292, Japan

来源：

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS | 1999年 / 35卷 / 03期

关键词：

beat phenomenon; gate-turn-off thyristor inverters; pulsewidth modulation; subharmonic method;

D O I：

10.1109/28.767011

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

In an asynchronous pulsewidth modulation (PWM) method, the ratio of the carrier frequency to the fundamental frequency must be at least 15-20 in order to suppress the beat phenomenon. However, it is impossible to achieve this condition for large-capacity inverters (e.g., gate-turn-off thyristor inverters), when the fundamental frequency is high. Assuming that the beat phenomenon is caused by an error generated in the PWM process, we have introduced a compensator to reduce the error. As a result, beat phenomenon can be decreased for a low carrier frequency. Effectiveness of the proposed method is shown by experimental results.

引用

页码：606 / 612

页数：7

共 7 条

[1]

FUKUDA S, 1993, IAS 93, PTS 1-3, P1130, DOI 10.1109/IAS.1993.299039

[2]

IWAJI Y, 1996, IEEJ NAT CONV

[3] A NEW NEUTRAL-POINT-CLAMPED PWM INVERTER [J].

NABAE, A ;

TAKAHASHI, I ;

AKAGI, H .

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 1981, 17 (05) :518-523

[4]

SALMON JC, 1989, IEEE IAS ANN M, P753

[5]

TANAKA S, 1992, IAS JAP C, P356

[6]

TANIGUCHI K, 1988, IEEJ NAT CONV, P636

[7]

Velaerts B., 1988, PESC '88 Record. 19th Annual IEEE Power Electronics Specialists Conference (Cat. No.88CH2523-9), P1255, DOI 10.1109/PESC.1988.18269

← 1 →