Two-dimensional analysis of the gate-source distance scaling effects in 4H-SiC MESFETs

Two-dimensional dc and small-signal ac analyses of the gate-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of the gate-source distance can improve device performance, enhancing drain current, transconductance and maximum oscillation frequency. This influence is associated with the dynamic characteristic of electrons in SiC MESFETs, which leads to a linear velocity regime in the source access region, even for high drain voltages. The variations of gate-to-source capacitance, gate-to-drain capacitance, cut-off frequency and maximum oscillation frequency with respect to the change in gate-source length have also been studied in detail. The obtained results can be used for a design guideline for the layout of 4H-SiC MESFETs.