Parameterized hardware libraries for configurable system-on-chip technology

被引:0
作者
Luk, W
Kean, T
Derbyshire, A
Gause, J
McKeever, S
Mencer, O
Yeow, A
机构
[1] Univ London Imperial Coll Sci Technol & Med, Dept Comp, London SW7 2BZ, England
[2] Algotronix Consulting, Edinburgh EH8 8JQ, Midlothian, Scotland
[3] Bell Labs, Comp Sci Res Ctr, Murray Hill, NJ 07974 USA
来源
CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE | 2001年 / 26卷 / 3-4期
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Two key components in configurable system-on-chip (CSoC) devices are instruction processors and field-programmable logic. This paper describes a framework, based on the Pebble language, that can be used to produce parameterized hardware libraries. Such libraries facilitate the development of user-defined hardware on the field-programmable logic to enhance the capability of the instruction processors in CSoC designs. Libraries are presented that support parameterization of the amount of pipelining and serialization to provide implementations with different trade-offs in resource usage and performance. These libraries have been developed to meet the requirements in terms of efficiency, validability, and ease of use. A case study involving DES encryption for Triscend E5 devices is presented.
引用
收藏
页码:125 / 129
页数:5
相关论文
共 16 条
[1]  
DERBYSHIRE A, 2000, LCNS, V1896
[2]  
DUPONTDEDINECHI.F, 1999, PORTABLE HIERARCHICA
[3]  
Goldberg LH, 1999, COMPUTER, V32, P13
[4]  
KEAN T, 1989, THESIS U EDINBURGH E
[5]  
KEAN T, 2000, LNCS, V1896
[6]  
LUK W, 1999, IEE DIG C REC SYST R
[7]  
LUK W, 1998, LNCS, V1482
[8]   SYSTEMATIC SERIALIZATION OF ARRAY-BASED ARCHITECTURES [J].
LUK, WWC .
INTEGRATION-THE VLSI JOURNAL, 1993, 14 (03) :333-360
[9]  
MCKEEVER SW, 2001, CORRECT HARDWARE DES, V2144
[10]  
MENCER O, 2001, LCNS, V2147