Deep-UV-Enhanced Approach for Low-Temperature Solution Processing of IZO Transistors with High-k AlOx/YAlOx Dielectric

被引:13
|
作者
Mancinelli, Alessio [2 ]
Bolat, Sami [1 ]
Kim, Jaemin [2 ]
Romanyuk, Yaroslav E. [1 ]
Briand, Danick [2 ]
机构
[1] Empa Swiss Fed Labs Mat Sci & Technol, CH-8600 Dubendorf, Switzerland
[2] Ecole Polytech Fed Lausanne, Soft Transducers Lab, CH-2000 Neuchatel, Switzerland
来源
ACS APPLIED ELECTRONIC MATERIALS | 2020年 / 2卷 / 10期
关键词
deep-UV; indium zinc oxide; low temperature; metal oxide; printing; solution processing; thin-film transistor; THIN-FILM TRANSISTORS; SOL-GEL; PERFORMANCE; PHOTODEGRADATION; TRANSPARENT; IRRADIATION; FABRICATION; INTEGRATION; DISPLAYS; GATE;
D O I
10.1021/acsaelm.0c00444
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Solution processing is an attractive alternative to standard vacuum fabrication techniques for the large-area manufacturing of metal oxide (MOx)-based electron devices. Here, we report on thin-film transistors (TFTs) based on a solution-processed indium zinc oxide (IZO) semiconductor utilizing a deep-ultraviolet (DUV)-enhanced curing, which enables a reduction of the annealing temperature to 200 degrees C. The effects of the DUV light exposure and the subsequent post-annealing parameters on the chemical composition of the IZO films have been investigated using Fourier-transform infrared spectroscopy and X-ray photoelectron spectroscopy. The semiconductor layer has been combined with an high-lc aluminum oxide/yttrium aluminum oxide (AlOx/YAlOx) dielectric stack to realize fully solution-processed MOx TFTs at low temperature. The IZO/AlOx/YAlOx TFTs treated for 20 min DUV followed by 60 min at 200 degrees C exhibited I-on/I-off of >10(8), a subthreshold slope (SS) of <100 mV dec(-1), and mobility (mu(sat)) of 15.6 +/- 4 cm(2) V-1 s(-1). Devices realized with a reduced semiconductor curing time of 5 min DUV and 5 min at 200 degrees C achieved I-on/I-o(ff) of >10(8), a SS <100 mV dec(-1), and mu(sat) of 2.83 +/- 1.4 cm(2 )V(-1) s(-1). The TFTs possess high operational stability under gate bias stress, exhibiting low shifts in the threshold voltage of <1 V after 1000 s. The DUV-enhanced approach reduces the thermal budget required for the curing of solution-processed IZO semiconductors films, paving the way for its further implementation on temperature-sensitive substrates in future.
引用
收藏
页码:3141 / 3151
页数:11
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