Modelling of Side-Wall Angle for Optical Proximity Correction for Self-Aligned Double Patterning

The pursuit of even smaller transistors has pushed some technological innovations in the field of lithography. In order to continue following the path of Moore's law, several solutions were proposed: EUV, e-beam and double patterning lithography. As EUV and e-beam lithography are still not ready for mass production for 20nm and 14nm nodes, double patterning lithography will play an important role for these nodes. In this work, we had focused on Self-Aligned Double-Patterning processes which consist in depositing a spacer material on each side of a mandrel exposed during a first lithography stepmaking the pitch to be divided by two after transfer into the substrate, the cutting of unwanted patterns being addressed through a second lithography exposure. In the specific case where spacers are deposited directly on the flanks of the resist, it is crucial to control its profiles as it could induce final CD errors or even spacer collapse. In this work, we will first study with a simple model the influence of the resist profile on the post-etch spacer CD. Then we will show that the placement of Sub-Resolution Assist Features (SRAF) can influence the resist profile and finally, we will see how much control of the spacer and inter-spacer CD we can achieve by tuning SRAF placement.