Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses

被引:60
作者
Bakiri, Mohammed [1 ,2 ]
Guyeux, Christophe [1 ]
Couchot, Jean-Francois [1 ]
Oudjida, Abdelkrim Kamel [2 ]
机构
[1] Univ Bourgogne Franche Comte, UMR CNRS 6174, DISC Dept, Femto ST Inst, F-90010 Belfort, France
[2] Ctr Dev Technol Avancees, ASM DMN Dept, Cite 20 Aout 1956 Baba Hassen,BP 17, Algiers 16303, Algeria
关键词
Random number generators; Field-Programmable Gate Array; Chaos; Physical security; Hardware Security; Applied cryptography; DESIGN; MULTIPLICATION; CONSTRUCTION; BEHAVIOR; CIPHER; FAMILY; CHAOS; TRNG; TRUE;
D O I
10.1016/j.cosrev.2018.01.002
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Random number generation refers to many applications such as simulation, numerical analysis, cryptography etc. Field Programmable Gate Array (FPGA) are reconfigurable hardware systems, which allow rapid prototyping. This research work is the first comprehensive survey on how random number generators are implemented on Field Programmable Gate Arrays (FPGAs). A rich and up-to-date list of generators specifically mapped to FPGA are presented with deep technical details on their definitions and implementations. A classification of these generators is presented, which encompasses linear and nonlinear (chaotic) pseudo and truly random number generators. A statistical comparison through standard batteries of tests, as well as implementation comparison based on speed and area performances, are finally presented. (C) 2018 Elsevier Inc. All rights reserved.
引用
收藏
页码:135 / 153
页数:19
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