Optimizing flow control for buffered switches

被引：5

作者：

Gramsamer, F ^{[1
]}

Gusat, M ^{[1
]}

Luijten, R ^{[1
]}

机构：

[1] IBM Res Corp, Zurich Res Lab, CH-8803 Ruschlikon, Switzerland

来源：

ELEVENTH INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATIONS AND NETWORKS, PROCEEDINGS | 2002年

关键词：

D O I：

10.1109/ICCCN.2002.1043103

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In our paper we address a problem often neglected in the presentation of credit flow control (FC) schemes for buffered switches, namely the issue of FC bandwidth and FC optimization, i.e. how many and which credits to return per packet cycle. Under the assumption of bursty traffic with uniform destinations we show via simulations that independent of switch size and without loss in performance the number of credits to be returned can be reduced to one. We further introduce the notion of credit contention and credit scheduling. We analyze four credit-scheduling strategies under varying system and buffer size. Our results demonstrate that with a proper credit scheduler in place contention resolution is resolved much faster than with conventional schemes. Our findings suggest that scheduling of credits is a means for the switch to determine its future arrivals during contention phases.

引用

页码：438 / 443

页数：6

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