S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance

被引:16
作者
Jeong, Taehoon [1 ]
Chandrakasan, Anantha P. [1 ]
Lee, Hae-Seung [1 ]
机构
[1] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
关键词
Analog-digital conversion; Feature extraction; Switches; Training; Capacitors; Side-channel attacks; Hardware; Analog-to-digital converter (ADC); convolutional neural network (CNN); current equalizer; multi-layer perceptron (MLP); neural network; power side-channel attack (PSA); successive approximation register (SAR) ADC;
D O I
10.1109/JSSC.2020.3027806
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
When an ADC is converting a confidential analog signal into digital codes, it may expose a critical hardware security loophole. By exploiting the strong correlation between the ADC digital output codes and the ADC supply current waveforms, an attacker can perform an ADC power side-channel attack (PSA) to steal the sensitive A/D conversion results by tapping into the power supply of the ADC. In this regard, this article demonstrates two neural-network-based successive approximation register (SAR) ADC PSA methods and a 12-bit, 1.25-MS/s prototype SAR ADC with current-equalizer-based PSA protection. The first ADC PSA method employs multi-layer perceptron networks (MLP-PSA), while the second ADC PSA method uses convolutional neural networks (CNN-PSA). With the protection disabled, both MLP-PSA and CNN-PSA extract the A/D conversion results from the ADC supply current waveforms with >99% bit-wise accuracy. With the protection enabled, strong PSA-resistance against MLP-PSA is demonstrated. The same SAR ADC exhibits weaker PSA-resistance against CNN-PSA but generally provides significant protection of A/D conversion results.
引用
收藏
页码:844 / 854
页数:11
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