A 1.5V 23MHz low power FGMOS filter

被引:0
作者
Rodríguez-Villegas, EO [1 ]
Rueda, A [1 ]
Yúfera, A [1 ]
机构
[1] Univ Sevilla, Inst Microelect Sevilla, IMSE, CNM, E-41012 Seville, Spain
来源
ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS | 2001年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents the design of a low voltage/low power second order filter based on the use of Floating-Gate MOS (FGMOS) transistors. This technique enables a voltage reduction in strong inversion mode keeping the performance of the block to the limit of 1.5V or even further, The biquad works in a frequency range between 04MH and 23MHz with a maximum power consumption of 900 L W for the highest value of the cutoff frequency. The THD is less than -40dB for a differential input of 1.6V peak to peak. The quality factor and gain are both adjustable in a rate larger than 10.
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页码:337 / 340
页数:4
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