Hardware Implementation of Hirschman Optimal Transform Based on Distributed Arithmetic

The Hirschman Optimal Transform (HOT) has been shown to be superior to Discrete Fourier Transform (DFT) in computational complexity and resolution. The HOT can be implemented by periodic shifts of the DFT. The DFT calculation is comprised of a sum of products which is well-suited to Distributed Arithmetic (DA). To evaluate the performance of the HOT implementation based on the DA structure, we designed two FPGA-implementations for a 256-point HOT. Simulations indicate that the proposed HOT implementation based on the DA requires 84.4% fewer multiplications and 7.3% fewer additions, with about 26.8% less processing latency than the HOT implementation based on the traditional structure. The performance of the proposed implementation is slightly reduced compared to the traditional structure. Tradeoffs between performance and space exist as in most implementation decisions.