A novel 7 Gbps low-power CMOS ultra-wideband pulse generator

被引:9
作者
Arafat, M. A. [1 ]
Harun-ur-Rashid, A. B. M. [1 ]
机构
[1] Bangladesh Univ Engn & Technol, Dept Elect & Elect Engn, Dhaka 1000, Bangladesh
关键词
UWB; DESIGN;
D O I
10.1049/iet-cds.2012.0057
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this study, a novel low-power high data rate ultra-wideband (UWB) pulse generator circuit is presented, which can be fully integrated in complementary metal oxide semiconductor (CMOS) process. The basic part of the circuit generates a UWB Gaussian monocycle pulse using the triangular pulse generation technique. A new bipolar phase shift keying pulse modulator is designed to control the polarity of the output pulses. The design includes additional functionality to make the pulse generator also applicable for transmitted reference (TR) signalling system. The circuit can generate pulses at a maximum rate of 7 giga pulse per second (Gpps) without TR pulse (TRP) and 3.5 Gpps with TRP. The generated pulses are symmetrical, each having a width of 142 ps and a peak-to-peak swing of 500 mV. The -3 dB bandwidth of the pulse spectrum is 9 GHz. The pulse generator consumes only 1.13 pJ per pulse from 1.2 V supply. The circuit is designed and simulated in 90 nm CMOS technology.
引用
收藏
页码:406 / 412
页数:7
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