Nonlinear behavioural model of charge pump PLLs

被引:17
作者
Brambilla, Angelo [1 ]
Linaro, Daniele [2 ]
Storace, Marco [2 ]
机构
[1] Politecn Milan, Dipartimento Elettron & Informaz, I-20133 Milan, Italy
[2] Univ Genoa, Biophys & Elect Engn Dept, I-16145 Genoa, Italy
关键词
PLL; switching system; VCO dynamics; locking range; PHASE-LOCKED LOOPS; N FREQUENCY-SYNTHESIZERS; PIECEWISE-SMOOTH MAPS; BIFURCATION-ANALYSIS; SWITCHING-CIRCUITS; FILIPPOV SYSTEMS; STEADY-STATE; SIMULATION; NOISE; OSCILLATORS;
D O I
10.1002/cta.1813
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Despite the nonlinear nature of even the simplest versions of phase locked loops (PLLs), linear models are still used during the first phases of the design of modern PLLs. Even though the linear model may represent a crude approach, its use is justified by the fact that accurate numerical simulations often require a too large amount of CPU time, being PLLs by construction stiff circuits, characterised by very different time scales. This aspect has triggered the need for compact models that allow fast and accurate numerical simulations. The scientific literature numbers several models that have been developed with different approaches and tailored to different simulation environments. In this context, we propose a nonlinear model of a type-II PLL, which (1) considers both the switching behaviour of the phase/frequency detector and charge pump and the complex dynamics (including the presence of amplitude and phase noise) of the voltage controlled oscillator, (2) is compact and can be easily implemented in modern mixed analog/digital simulators as a behavioural block, and (3) allows the simulation of spurs owing to the nonlinearities of both the charge pump and the fractional frequency divider. Copyright (c) 2012 John Wiley & Sons, Ltd.
引用
收藏
页码:1027 / 1046
页数:20
相关论文
共 48 条
[1]   A stable loss control feedback loop for VCO amplitude tuning [J].
Bahmani, Faramarz ;
Sanchez-Sinencio, Edgar .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2006, 53 (12) :2498-2506
[2]   Bifurcations in two-dimensional piecewise smooth maps - Theory and applications in switching circuits [J].
Banerjee, S ;
Ranjan, P ;
Grebogi, C .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2000, 47 (05) :633-643
[3]   Bifurcations in one-dimensional piecewise smooth maps-theory and applications in switching circuits [J].
Banerjee, S ;
Karthik, MS ;
Yuan, GH ;
Yorke, JA .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2000, 47 (03) :389-394
[4]   Comprehensive Behavioral Modeling of Conventional and Dual-Tuning PLLs [J].
Bizjak, Luca ;
Da Dalt, Nicola ;
Thurner, Peter ;
Nonis, Roberto ;
Palestri, Pierpaolo ;
Selmi, Luca .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2008, 55 (06) :1628-1638
[5]   Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits [J].
Bizzarri, Federico ;
Brambilla, Angelo ;
Gajani, Giancarlo Storti .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (03) :541-554
[6]  
BOLCATO P, 1992, 1992 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, P887, DOI 10.1109/ISCAS.1992.230079
[7]   Frequency warping in time-domain circuit simulation [J].
Brambilla, A ;
Storti-Gajani, G .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 2003, 50 (07) :904-913
[8]   Robust Harmonic-Probe Method for the Simulation of Oscillators [J].
Brambilla, Angelo ;
Gruosso, Giambattista ;
Gajani, Giancarlo Storti .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (09) :2531-2541
[9]   Periodic noise analysis of electric circuits: Artifacts, singularities and a numerical method [J].
Brambilla, Angelo ;
Gruosso, Giambattista ;
Redaelli, Massimo ;
Gajani, Giancarlo Storti .
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2010, 38 (07) :689-708
[10]   FSSA: Fast Steady-State Algorithm for the Analysis of Mixed Analog/Digital Circuits [J].
Brambilla, Angelo ;
Gruosso, Giambattista ;
Gajani, Giancarlo Storti .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (04) :528-537