Numerical analysis of Double Gate and Gate All Around MOSFETs with bulk trap states

被引：25

作者：

Abdi, M. A. ^{[1
]}

Djeffal, F. ^{[1
]}

Arar, D. ^{[1
]}

Hafiane, M. L. ^{[1
]}

机构：

[1] Univ Batna, Dept Elect, LEA, Batna, Algeria

来源：

JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS | 2008年 / 19卷 / Suppl 1期

关键词：

Trap Charge; Virtual Cathode; Subthreshold Swing; Double Gate; Bulk Trap;

D O I：

10.1007/s10854-007-9531-y

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper investigates the scaling capability of Double Gate (DG) and Gate All Around (GAA) MOSFETs using a numerical analysis of the two-dimensional coupled Boltzmann distribution-Poisson equations in which the traps effects have been considered. Using this numerical model, we have studied the effects of the defects on the scalability limits of DG and GAA MOSFETs and compared their performances. We have found that, the scaling capability of both architectures made in recrystallized silicon will be improved as the diameter (or silicon thickness for DG structure) of device is reduced, because the small device size decreases the defect density in the channel.

引用

页码：S248 / S253

页数：6

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