Runtime Elision of Transactional Barriers for Captured Memory

被引：4

作者：

Carvalho, Fernando Miguel ^{[1
,2
]}

Cachopo, Joao

机构：

[1] Lisbon Polytech Inst ISEL, ADEETC, Lisbon, Portugal

[2] Univ Tecn Lisboa, INESC, ID Lisboa, Lisbon, Portugal

来源：

ACM SIGPLAN NOTICES | 2013年 / 48卷 / 08期

关键词：

Performance; Transactions; Software Transactional Memory; Runtime Optimizations;

D O I：

10.1145/2517327.2442556

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

In this paper, we propose a new technique that can identify transaction-local memory (i.e. captured memory), in managed environments, while having a low runtime overhead. We implemented our proposal in a well known STM framework (Deuce) and we tested it in STMBench7 with two different STMs: TL2 and LSA. In both STMs the performance improved significantly (4 times and 2.6 times, respectively). Moreover, running the STAMP benchmarks with our approach shows improvements of 7 times in the best case for the Vacation application.

引用

页码：303 / 304

页数：2

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