Evaluation of RF electrostatic discharge (ESD) protection in 0.18-μm CMOS technology

被引：5

作者：

Du, Xiaoyang ^{[1
]}

Dong, Shurong ^{[1
]}

Han, Yan ^{[1
]}

Liou, Juin J. ^{[1
,2
]}

Huo, Mingxu ^{[1
]}

Li, You ^{[2
]}

Cui, Qiang ^{[1
]}

Huang, Dahai ^{[1
]}

Wang, Demiao ^{[1
]}

机构：

[1] Zhejiang Univ, ESD Lab, Dept ISEE, Hangzhou 310027, Zhejiang, Peoples R China

[2] Univ Cent Florida, Sch Elect & Comp Engn, Orlando, FL 32816 USA

来源：

MICROELECTRONICS RELIABILITY | 2008年 / 48卷 / 07期

关键词：

D O I：

10.1016/j.microrel.2008.04.005

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Electrostatic discharge (ESD) protection design is challenging for RF integrated circuits (ICs) because of the trade-off between the ESD robustness and parasitic capacitance. ESD protection devices are fabricated using the 0.18-mu m RF CMOS process and their RF ESD characteristics are investigated by the transmission line pulsing (TLP) tester. The results suggest that the silicon controlled rectifier (SCR) is superior to the diode and NMOS from the perspective of ESD robustness and parasitic, but the SCR nevertheless possesses a longer turn-on time. (C) 2008 Elsevier Ltd. All rights reserved.

引用

页码：995 / 999

页数：5

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