共 50 条
- [21] Implementation of Reversible Logic Gates with Quantum Gates 2021 IEEE 11TH ANNUAL COMPUTING AND COMMUNICATION WORKSHOP AND CONFERENCE (CCWC), 2021, : 1557 - 1563
- [22] Design and Implementation of a Reversible Central Processing Unit 2015 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2015, : 187 - 190
- [23] Modelling and Simulation of a Reversible Quantum Logic based 4 × 4 Multiplier Design for Nanotechnology Applications International Journal of Theoretical Physics, 2020, 59 : 57 - 67
- [24] Design and Analysis of Energy Efficient Reversible Logic based Full Adder 2019 IEEE 62ND INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2019, : 339 - 342
- [27] DESIGN AND IMPLEMENTATION OF PAL AND PLA USING REVERSIBLE LOGIC ON FPGA SPARTAN 3E 2017 FOURTH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATION AND NETWORKING (ICSCN), 2017,
- [29] A new look at reversible logic implementation of decimal adder 2007 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP PROCEEDINGS, 2007, : 121 - +
- [30] Verilog Design of Full Adder Based on Reversible Gates 2016 2ND INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATION, & AUTOMATION (ICACCA) (FALL), 2016, : 65 - 69