Flyback-based high step-up converter with reduced power processing stages

被引:40
作者
Chu, G. M. L. [1 ]
Lu, D. D. C. [1 ]
Agelidis, V. G. [2 ]
机构
[1] Univ Sydney, Sch Elect & Informat Engn, Sydney, NSW 2006, Australia
[2] Univ New S Wales, Sch Elect Engn & Telecommun, Sydney, NSW 2052, Australia
关键词
HIGH-EFFICIENCY; MODE; FAMILY; CCM;
D O I
10.1049/iet-pel.2011.0204
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study proposes a non-isolated converter derived from the conventional flyback topology based on the concept of reduced power processing. The proposed converter has higher-voltage gain, improved efficiency and reduced component stresses owing to recycling of leakage energy and clamped power switch voltage when compared with the conventional flyback converter, and yet retains the advantages of circuit simplicity and low cost. A complete analysis including converter operation and its dc and ac characterisations are presented in the paper. Using a 60 W laboratory prototype operating at 100 kHz with 24 V input voltage and 200 V regulated output voltage, experimental evaluation of the efficiency improvement, steady-state and transient-response performance are presented to verify the effectiveness of the proposed converter.
引用
收藏
页码:349 / 357
页数:9
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