A 2.5-V sigma-delta modulator for broadband communications applications

被引:103
|
作者
Vleugels, K [1 ]
Rabii, S
Wooley, BA
机构
[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
[2] Aeluros Inc, Palo Alto, CA 94301 USA
关键词
analog-to-digital conversion; CMOS analog integrated circuits; double sampling; dynamic element matching; integrated circuit design; mixed analog-digital integrated circuits; sampled-data circuits; sigma-delta modulation; switched-capacitor circuits;
D O I
10.1109/4.972139
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Oversampled sigma-delta (Sigma Delta) modulators offer numerous advantages for the realization of high-resolution analog-to-digital (A/D) converters. This paper explores how oversampling and feedback can be employed in high-resolution Sigma Delta modulators to extend the signal bandwidth into the range of several megahertz when the oversampling ratio is constrained by technology limitations. A 2-2-1 cascaded multibit architecture suitable for operation from a 2.5-V power supply is presented, and a linearization technique referred to as partitioned data weighted averaging is introduced to suppress in-band digital-to-analog converter (DAC) errors. An experimental prototype based on the proposed topology has been integrated in a 0.5-mum double-poly triple-metal CMOS technology. Fully differential double-sampled switched-capacitor integrators enable the modulator to achieve 95-dB dynamic range at a 4-Msample/s Nyquist conversion rate with an oversampling ratio of 16. The experimental modulator dissipates 150 mW from a 2.5-V supply.
引用
收藏
页码:1887 / 1899
页数:13
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