A statechart based HW/SW codesign system

被引：0

作者：

Bates, ID ^{[1
]}

Chester, EG ^{[1
]}

Kinniment, DJ ^{[1
]}

机构：

[1] Univ Newcastle Upon Tyne, EPSRC, Engn Design Ctr, Newcastle Upon Tyne NE1 7RU, Tyne & Wear, England

来源：

PROCEEDINGS OF THE SEVENTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CODESIGN (CODES'99) | 1999年

关键词：

statecharts; POLIS; CFSMs;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The Codesign Finite State Machine [1] (CFSM) formal model provides a suitable approach for the description of hardware/software systems. The POLIS tool from Berkeley implements the CFSM methodology but currently relies on the textually based Esterel specification language as a high level for the description of individual CFSMs. The designer must then use the Ptolemy simulator to interconnect the CFSM network and perform co-simulation. This paper describes work in progress in developing a system which instead aims to use StatemateTM, a statechart based tool for seamless specification and co-simulation of the entire CFSM network, whilst using the POLIS tool for 'C', VHDL code generation and performance estimation. This technique should give the clear advantages of using a graphical specification language together with a uniform co-simulation framework.

引用

页码：162 / 166

页数：5