A Simple Output Impedance Model for Doherty Peaking Sub-Amplifiers Biased in Class C

A simple model of the Doherty peaking sub-amplifier is proposed that approximates the frequency-dependant behavior of its output impedance as seen at the reference plane of the carrier-peaking combining node. The analytical model is useful in that it shows the degradation of the output impedance over frequency as a function of fundamental device and network properties: device output capacitance, transformation ratio, and network delay. The model provides significant insight into the behavior and theoretical upper limit of output impedance when the sub-amplifier is disengaged and provides a benchmark for which to compare practical results for broadband Doherty amplifier designs. By augmenting the model with subthreshold drain-to-source resistance, excellent agreement is shown between the model and experimental results over frequency.