Design of hardened flip-flop using Schmitt trigger-based SEM latch in CNTFET technology

被引：6

作者：

Badugu, Divya Madhuri ^{[1
]}

Sunithamani, S. ^{[1
]}

Shaik, Javid Basha ^{[2
]}

Vobulapuram, Ramesh Kumar ^{[2
]}

机构：

[1] Koneru Lakshmaiah Educ Fdn, Dept Elect & Commun Engn, Guntur, Andhra Pradesh, India

[2] Rajeev Gandhi Mem Coll Engn & Technol, Dept Elect & Commun Engn, Nandyal, India

来源：

CIRCUIT WORLD | 2021年 / 47卷 / 01期

关键词：

Carbon nanotubes; VLSI interconnect and circuits; Schmitt trigger; SEM latch; CNTFET; Soft errors; TRANSISTORS INCLUDING NONIDEALITIES; COMPACT SPICE MODEL; CIRCUIT; DEVICE;

D O I：

10.1108/CW-10-2019-0141

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Purpose The purpose of this paper is to design novel hardened flip-flop using carbon nanotube field effect transistors (CNTFETs). Design/methodology/approach To design the proposed flip-flop, the Schmitt trigger-based soft error masking and unhardened latches have been used. In the proposed design, the novel mechanism, i.e. hysteresis property is used to enhance the hardness of the single event upset. Findings To obtain the simulation results, all the proposed circuits are extensively simulated in Hewlett simulation program with integrated circuit emphasis software. Moreover, the results of the proposed latches are compared to the conventional latches to show performance improvements. It is noted that the proposed latch shows the performance improvements up to 25.8%, 51.2% and 17.8%, respectively, in terms of power consumption, area and power delay product compared to the conventional latches. Additionally, it is observed that the simulation result of the proposed flip-flop confirmed the correctness with its respective functions. Originality/value The novel hardened flip-flop utilizing ST based SEM latch is presented. This flip-flop is significantly improves the performance and reliability compared to the existing flip-flops.

引用

页码：51 / 59

页数：9

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