An Improved Topology of SEPIC Converter With Reduced Output Voltage Ripple

被引：40
作者：
Al-Saffar, Mustafa A. [1 ]
Ismail, Esam H. [1 ]
Sabzali, Ahmad J. [1 ]
Fardoun, Abbas A. [2 ]
机构：
[1] Coll Technol Studies, Dept Elect Engn, Al Shaab 36051, Kuwait
[2] United Arab Emirates Univ, Dept Elect Engn, Al Ain, U Arab Emirates
来源：
IEEE TRANSACTIONS ON POWER ELECTRONICS | 2008年 / 23卷 / 05期
关键词：
Active clamp; continuous conduction mode (CCM); dc-dc power conversion; ripple reduction; single-ended primary inductor converter (SEPIC);
D O I：
10.1109/TPEL.2008.2001916
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An improved version of a single-ended primary inductor converter (SEPIC) is presented. The converter consists of a conventional SEPIC converter plus an additional high-frequency transformer and diode to maintain a freewheeling mode of the dc inductor currents during the switch on state. The voltage conversion ratio characteristics and semiconductor device voltage and current stresses are characterized. The main advantages of this converter are the continuous output current, smaller output voltage ripple, and lower semiconductors current stress compared with the conventional SEPIC converter. The design and simulation of the concept is verified by an experiment with a 48-V input and 12-V/3.75-A output converter.
引用
收藏
页码：2377 / 2386
页数：10
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