Ultra-thin wafers: Processing and defect issues

The further increase of the wafer diameter, required for high-volume production of integrated circuits, is combined with an increasing thickness of the wafers. The chip thickness, however, decreases in the same time to about 20 Am. Therefore techniques are necessary allowing the thinning of the whole wafer in a time and cost efficient way and with a high accuracy. The actual processing techniques and further trends for wafer thinning are summarized. The most important parameters (final surface structure (roughness), generation of subsurface defects, mechanical stresses) are discussed. Concepts of handling techniques and final processing steps of ultra-thin wafers are presented.