SMT-Based Translation Validation for Machine Learning Compiler

被引:10
作者
Bang, Seongwon [1 ]
Nam, Seunghyeon [1 ]
Chun, Inwhan [1 ]
Jhoo, Ho Young [1 ]
Lee, Juneyoung [2 ]
机构
[1] Seoul Natl Univ, Seoul, South Korea
[2] CryptoLab, Seoul, South Korea
来源
COMPUTER AIDED VERIFICATION (CAV 2022), PT II | 2022年 / 13372卷
基金
新加坡国家研究基金会;
关键词
D O I
10.1007/978-3-031-13188-2_19
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Machine learning compilers are large software containing complex transformations for deep learning models, and any buggy transformation may cause a crash or silently bring a regression to the prediction accuracy and performance. This paper proposes an SMT-based translation validation framework for Multi-Level IR (MLIR), a compiler framework used by many deep learning compilers. It proposes an SMT encoding tailored for translation validation that is an over-approximation of the FP arithmetic and reduction operations. It performs abstraction refinement if validation fails. We also propose a new approach for encoding arithmetic properties of reductions in SMT. We found mismatches between the specification and implementation of MLIR, and validated high-level transformations for SqueezeNet, MobileNet, and text_classification with proper splitting.
引用
收藏
页码:386 / 407
页数:22
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